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METHOD TO REDUCE EXCESS NOISE IN ELECTRONIC DEVICES AND MONOLITHIC INTEGRATED CIRCUITSCM Patents

Índice de la ficha

Updated at
24/07/2026
Numero publicacion
EP.1950796.A2
Fecha publicacion
30/07/2008
Numero solicitud
EP20060841690

En detalle

Resumen

This invention proposes the use of a thermodynamic screen placed under the electronic devices whose excess noise is to be reduced in order to block the transverse currents between said devices and subjacent layers that are responsible for the aforementioned excess noise. For epitaxial layers as those used in Microelectronics, the barrier layer (2) with an opposed doping to the epilayer supporting the devices (4), and the non-doped separating layer (3) form the thermodynamic screen which, embedded between the epilayer (4) and the substrate (1), reduces the aforementioned transverse currents and thus the excess noise of the devices on the epilayer (4) when they are biased. The connection between the ohmic contact (7) of the screen layer (2) with the source (6) of the FET transistors of the epilayer (4) (dashed line) or with their gate (5) removes the thermal noise of the capacitor that existed under those FET transistors and hence, the corresponding excess noise in these devices

Reivindicaciones

1. Method to reduce excess noise in planar electronic devices characterized by the use of a thermodynamic barrier for charge carriers, formed by a screen-layer (2) whose doping is opposed to the doping of the epilayer (4) used to make the devices and an undoped, separating-layer (3) embedded between the devices and the screen-layer (2), all the above grown or placed onto a substrate (1) that can be a semi-insulating substrate or a conducting substrate, being the latter useful as screen-layer if its doping is opposed to the doping of the epilayer (4) used to make the devices. 2. Method to reduce excess noise in planar electronic devices following claim 1<st> , characterized by a low impedance electrical connection of the screen-layer (2) of the aforementioned thermodynamic screen to the Source (6) or to the Gate (5) of the field effect transistors in the epilayer (4) or to one of the Source (6) or Drain (8) ends of the resistors in the epilayer (4), obtained as simplified versions of the aforementioned field effect transistors when the Gate (5) does not exist or when it is connected to one of the ends Source (6) or Drain (8) of the resistor obtained in this way. 3. Use of the method to reduce excess noise described in claims 1<st> and 2<nd> for those devices characterized by a structure comprising an inner conducting channel surrounded by a neighbour conductor that is done by the electrical connection of the surrounding conductor to one of the ends of the inner conducting channel directly, or through a low-impedance circuit allowing an efficient reduction of the amplitude of thermodynamic kT/C noise that would have the capacitance C between the inner channel and the outer conductor before the proposed connection was done.

Etiquetas

Inventores
Izpura Jose IgnacioIzpura Torres Joe IgnacioIzpura Torres Jose Ignacio
Solicitantes
Universidad Politécnica de Madrid
Clasificacion ipc
H01L 21/ 20 A IH01L 21/ 336 A IH01L 21/ 8238 A IH01L 29/ 812 A I
Clasificacion cpc
257/280257/E29.317
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