madrid2i

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An integrated transistor module including a lead frame having first and second spaced pads, one or more common source-drain leads located between the first and second pads, and one or more drain leads located on the outside of the second pad. First and second transistors are flip chip attached respectively to the first and second pads, wherein the source of the second transistor is electrically connected to the one or more common source-drain leads. A first clip is attached to the drain of the first transistor and electrically connected to the one or more common source-drain leads. A second clip is attached to the drain of the second transistor and electrically connected to the one or more drain leads located on the outside of the second pad. Molding material encapsulates the lead frame, the transistors, and the clips to form the module. By leaving the lead frame pads and clips exposed and free of molding material, dual cooling of the module is effected.

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CLAIMS 1. An integrated transistor module comprising: a lead frame having first and second spaced pads and one or more common source-drain leads located between said first and second pads; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; and a first ciip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads. 2. The module of claim 1 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET). 3. The module of claim I wherein said first and second transistors are respectively high side and low side power transistors that are components of a bucky converter. 4. The module of claim 1 wherein said lead frame includes one or more drain leads located on the outside of said second pad, and including a second clip attached to the drain of said second transistor and electrically connected to said one or more drain leads located on the outside of said second pad. 5. The module of claim 1 wherein said lead frame, said transistors and said clip are encapsulated in molding material, with the pads of the lead frame and the clip being exposed to provide dual cooling of said module. 6. An integrated transistor module comprising: a lead frame having first and second spaced pads, one or more common source-drain leads located between said first and second pads, and one or more drain leads located on the outside of said second pad; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads; a second clip attached to the drain of said second transistor and electrically connected to said one or more drain leads located on the outside of said second pad; and molding material encapsulating said lead frame, said transistors, and said clips to form said module. 7. The module of claim 6 wherein said pads of the lead frame and the clips are exposed and free from molding materia! to provide dual cooling of said module. 8. The module of claim 6 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET). 9. The module of claim 6 wherein said first and second transistors are respectively high side and low side power transistors that are components of a bucky converter. 10 The module of claim 6 wherein said one or more common source-drain leads arc configured to be cut so that two individual single transistor packages can be formed. 1 1. The module of claim 6 wherein said lead frame has a gate lead between said first and second pads and wherein said first clip is not electrically attached to said gate lead. 12. The module of claim 6 wherein said first clip has a planar member and downwardly extending leads that are electrically connected to said common source- drain leads of said lead frame; and wherein said second clip has a planar member and downwardly extending leads that are electrically connected to said one or more drain leads of said lead frame located on the outside of said second pad. 13. The module of claim 12 wherein said lead frame has a gate lead between said first and second pads and wherein said first clip has no downwardly extending lead to be electrically connected to said gate lead. 14. The module of claim 6 wherein said lead frame is configured to have a leaded footprint which can be converted to a leadless module by cutting off the lead portion of the module. 15. The module of claim 6 wherein said common source drain leads are partially severed to disconnect the connection, and wherein a common heat sink is attached to and connects said first and second clips. !6. The module of claim 6 including an integrated circuit attached to said lead frame and electrically connected to said first and second transistors, said integrated circuit being encapsulated by said molding material to form a single module. 17. A method of making an integrated transistor module comprising: providing a lead frame having first and second spaced pads, one or more common source-drain leads located between said pads and one or more drain leads located on the outside of said second pad; flip chip attaching first and second transistors respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; attaching a first clip to the drain of said first transistor and electrically connecting said first clip to said one or more common source-drain leads; attaching a second clip to the drain of said second transistor and electrically connecting said second clip to said one or more drain leads located on the outside of said second pad; and encapsulating said lead frame, said transistors, and said clips with molding material to form said module. 18 The method of claim 17 wherein said pads of the lead frame and said clips are exposed and free from molding material to provide dual cooling of said module. 19. The method of claim 17 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET). 20. The method of claim 17 wherein said first and second transistors are respectively high side and low side power transistors that are components of a biicky converter. 21. A power quad flat no-lead package having an exposed top thermal drain clip with a folded stud and an exposed thermal source pad.

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